一种用于低功耗纳米级数字集成电路的新型部分绝缘无结晶体管

2014 IEEE 2nd International Conference on Emerging Electronics (ICEE) Pub Date : 2014-12-01 DOI:10.1109/ICEMELEC.2014.7151171

G. C. Patil, Vijaysinh H. Bonge, M. Malode, Rahul G. Jain

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引用次数: 1

摘要

本文提出了一种新的器件结构——部分绝缘(Pi-OX)无结晶体管(JLT)，并将其模拟结果与现有的绝缘体上硅(SOI) JLT进行了比较。此外，还比较了所提出的Pi-OXJLT和SOIJLT的漏极诱导势垒降低(DIBL)、亚阈值摆幅(SS)、通态驱动电流(ION)、关态泄漏电流(IOFF)、离子/IOFF比和静态功耗(PSTAT)。研究发现，与现有的SOIJLT相比，所提出的Pi-OXJLT的IOFF、DIBL和SS分别降低了57%、17%和10%。提出了Pi-OXJLT的制作流程。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A novel partially insulated junctionless transistor for low power nanoscale digital integrated circuits

In this paper, a novel device structure named as partially insulated (Pi-OX) junctionless transistor (JLT) is proposed and the simulated results below 20 nm have been compared with existing silicon-on-insulator (SOI) JLT. Further, drain-induced barrier lowering (DIBL), subthreshold swing (SS), on-state drive current (ION), off-state leakage current (IOFF), ION/IOFF ratio and static power dissipation (PSTAT) of the proposed Pi-OXJLT and SOIJLT has also been compared. It has been found that, IOFF, DIBL and SS in the case of proposed Pi-OXJLT are reduced by 57%, 17% and 10% respectively over the existing SOIJLT device. The fabrication flow of the proposed Pi-OXJLT is proposed.

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来源期刊

2014 IEEE 2nd International Conference on Emerging Electronics (ICEE)

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