具有可重构指令集的嵌入式VLIW处理器

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-10-27 DOI:10.1109/JSSC.2003.818292

Andrea Lodi, M. Toma, F. Campi, A. Cappelli, R. Canegallo, R. Guerrieri

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引用次数: 159

摘要

RISC VLIW处理器实现了动态指令集扩展，集成了流水线的、运行时可重构的数据路径。一个0.18 /spl mu/m的6M CMOS芯片原型在信号处理算法基准上实现了高达90%的能耗降低和13/spl倍/秒的时间减少。该IC包含12M晶体管，从1.8 V电源在80 MHz时耗散120 mW。

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A VLIW processor with reconfigurable instruction set for embedded applications

A RISC VLIW processor implements dynamic instruction set extension integrating a pipelined, run-time reconfigurable datapath. A 0.18 /spl mu/m 6M CMOS chip prototype achieves energy consumption reduction up to 90% and time reduction of 13/spl times/ on a signal processing algorithm benchmark. The IC contains 12M transistors and dissipates 120 mW at 80 MHz from a 1.8 V supply.

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2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

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