低位错密度3英寸Si掺杂GaAs晶体的垂直船形生长

Proceedings of Semiconducting and Semi-Insulating Materials Conference Pub Date : 1996-04-29 DOI:10.1109/SIM.1996.571099

Y. Hagi, S. Kawarabayashi, T. Inoue, R. Nakai, J. Kohno, T. Kawase, M. Tatsumi

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引用次数: 3

摘要

采用垂直船法(VB)制备了低位错密度(/spl les/100 cm/sup -2/)的3英寸Si掺杂GaAs晶体。固/液界面的形状受界面附近温度梯度的控制。通过经验和计算机模拟研究了低位错密度时理想的界面形状。通过改善界面形状，实现了低位错密度晶体的稳定生成。

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Low dislocation density 3-inch Si doped GaAs crystals by Vertical Boat growth

3-inch Si doped GaAs crystals with low dislocation density (/spl les/100 cm/sup -2/) were developed by the Vertical Boat (VB) method. The shape of the solid/liquid interface was controlled by the temperature gradient near the interface. The desirable interface shape for low dislocation density was studied both empirically and through computer simulation. By improving the interface shape, the stable production of crystals with low dislocation density were achieved.

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Proceedings of Semiconducting and Semi-Insulating Materials Conference

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