{"title":"2.5 Gbps CMOS光接收机模拟前端","authors":"Wei-Zen Chen, Chao-Hsin Lu","doi":"10.1109/CICC.2002.1012842","DOIUrl":null,"url":null,"abstract":"A 3 V, single chip optical receiver analog front-end capable of operating at 2.5 Gbit/s is fabricated in a 0.35 /spl mu/m CMOS technology. The IC contains a transimpedance amplifier (TIA) with 54.5 dB/spl Omega/ conversion gain, f/sub -3 dB/ of 2.5 GHz, and a limiting amplifier with a conversion gain of 42 dB, f/sub -3 dB/ of 2.3 GHz. The TIA is DC coupled to the limiting amplifier. The measured eye diagram meets the OC-48 transition mask. Input referred noise current is about 800 nA.","PeriodicalId":209025,"journal":{"name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"30","resultStr":"{\"title\":\"A 2.5 Gbps CMOS optical receiver analog front-end\",\"authors\":\"Wei-Zen Chen, Chao-Hsin Lu\",\"doi\":\"10.1109/CICC.2002.1012842\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 3 V, single chip optical receiver analog front-end capable of operating at 2.5 Gbit/s is fabricated in a 0.35 /spl mu/m CMOS technology. The IC contains a transimpedance amplifier (TIA) with 54.5 dB/spl Omega/ conversion gain, f/sub -3 dB/ of 2.5 GHz, and a limiting amplifier with a conversion gain of 42 dB, f/sub -3 dB/ of 2.3 GHz. The TIA is DC coupled to the limiting amplifier. The measured eye diagram meets the OC-48 transition mask. Input referred noise current is about 800 nA.\",\"PeriodicalId\":209025,\"journal\":{\"name\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"30\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2002.1012842\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2002.1012842","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 3 V, single chip optical receiver analog front-end capable of operating at 2.5 Gbit/s is fabricated in a 0.35 /spl mu/m CMOS technology. The IC contains a transimpedance amplifier (TIA) with 54.5 dB/spl Omega/ conversion gain, f/sub -3 dB/ of 2.5 GHz, and a limiting amplifier with a conversion gain of 42 dB, f/sub -3 dB/ of 2.3 GHz. The TIA is DC coupled to the limiting amplifier. The measured eye diagram meets the OC-48 transition mask. Input referred noise current is about 800 nA.