/spl mu/I/O架构适用于0.13-/spl mu/m宽电压范围的单包系统(SoP)设计

2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) Pub Date : 2002-06-13 DOI:10.1109/VLSIC.2002.1015075

Y. Kanno, H. Mizuno, N. Oodaira, Y. Yasu, K. Yanagisawa

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引用次数: 13

摘要

为了提供低成本的系统解决方案以及0.13-/spl mu/m双t/sub / CMOS和多芯片封装(MCP)技术，开发了一种新的，所谓的/spl mu/I/O架构。/spl mu/I/O在整个模块中提供了一个通用接口，因此可以为mcp提供高设计可重用性和分层I/O设计。/spl mu/I/O包括一个信号级转换器，用于集成宽电压范围(0.75-1.3或1.5-3.6 V)电路模块，以及一个信号墙功能，通过使用内部电源开关独立关闭每个模块，而不会产生无效的信号传输。

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/spl mu/I/O architecture for 0.13-/spl mu/m wide-voltage-range system-on-a-package (SoP) designs

To provide low-cost system solutions together with a 0.13-/spl mu/m dual-t/sub ox/ CMOS and multi-chip package (MCP) technologies, a new, so-called /spl mu/I/O architecture was developed. The /spl mu/I/O provides a common interface throughout the module and, thus, enables high design reusability and hierarchical I/O design for MCPs. The /spl mu/I/O includes a signal-level converter for integrating wide-voltage-range (0.75-1.3 or 1.5-3.6 V) circuit blocks, and a signal wall function for turning off each block independently - without invalid signal transmission - by using an internal power switch.

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2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)

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