P. Kammerling, A. Ackens, H. Loevenich, A. Borga, P. Wustner, G. Kemmerling, W. Erven, K. Zwoll, H. Kleines, M. Drochner
{"title":"通过TCP/IP和以太网配置FPGA","authors":"P. Kammerling, A. Ackens, H. Loevenich, A. Borga, P. Wustner, G. Kemmerling, W. Erven, K. Zwoll, H. Kleines, M. Drochner","doi":"10.1109/RTC.2007.4382790","DOIUrl":null,"url":null,"abstract":"A RAM based FPGA can be configured with a bootimage from a local proprietary flash prom, by a JTAG adapter hooked to a local PC interface or any another component, which copes with one of the FPGA configuration protocols. The development of the FPGA code as well as updates of the bootimage can be done by a JTAG adapter. On the basis of a PCB developed in the ZEL we show a first step towards an embedded JTAG adapter for TCP/IP-Ethernet.","PeriodicalId":217483,"journal":{"name":"2007 15th IEEE-NPSS Real-Time Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"FPGA Configuration by TCP/IP and Ethernet\",\"authors\":\"P. Kammerling, A. Ackens, H. Loevenich, A. Borga, P. Wustner, G. Kemmerling, W. Erven, K. Zwoll, H. Kleines, M. Drochner\",\"doi\":\"10.1109/RTC.2007.4382790\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A RAM based FPGA can be configured with a bootimage from a local proprietary flash prom, by a JTAG adapter hooked to a local PC interface or any another component, which copes with one of the FPGA configuration protocols. The development of the FPGA code as well as updates of the bootimage can be done by a JTAG adapter. On the basis of a PCB developed in the ZEL we show a first step towards an embedded JTAG adapter for TCP/IP-Ethernet.\",\"PeriodicalId\":217483,\"journal\":{\"name\":\"2007 15th IEEE-NPSS Real-Time Conference\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 15th IEEE-NPSS Real-Time Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RTC.2007.4382790\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 15th IEEE-NPSS Real-Time Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RTC.2007.4382790","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
基于RAM的FPGA可以通过连接到本地PC接口的JTAG适配器或处理FPGA配置协议之一的任何其他组件,使用来自本地专有闪存prom的引导映像进行配置。FPGA代码的开发以及引导映像的更新可以通过JTAG适配器完成。基于在ZEL中开发的PCB,我们向TCP/ ip -以太网的嵌入式JTAG适配器迈出了第一步。
A RAM based FPGA can be configured with a bootimage from a local proprietary flash prom, by a JTAG adapter hooked to a local PC interface or any another component, which copes with one of the FPGA configuration protocols. The development of the FPGA code as well as updates of the bootimage can be done by a JTAG adapter. On the basis of a PCB developed in the ZEL we show a first step towards an embedded JTAG adapter for TCP/IP-Ethernet.