基于隐式门和反隐式门的忆阻器合成布尔函数的改进方法

F. Lalchhandama, B. Sapui, K. Datta
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引用次数: 18

摘要

近年来,忆阻器的研究引起了广泛的关注,因为这些器件具有独特的性能,可以用于执行各种逻辑和存储操作。基于忆阻器的存储系统有望在不久的将来取代闪存设备。此外,利用忆阻器合成和优化布尔函数正成为一个重要的研究领域。已报道的忆阻器逻辑设计风格多种多样,其中实现物质蕴涵运算的忆阻器逻辑设计风格构成了本文工作的基础。隐式门实现隐式运算,只需要两个忆阻器和一个电阻即可实现。在本工作中,广泛使用的合成工具ABC用于将任意布尔函数合成为一个隐门网表。为了优化用于实现的忆阻器的数量,我们提出了一个反暗示门,用于处理由ABC工具生成的中间网表中的扇出。在多达16个变量的标准基准函数上进行了综合实验,结果表明,与现有的最先进方法相比,评估所需的步骤总数提高了22.8%。对于具有9个或更多变量的函数,改进幅度增加到35.5%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY Gates
Research on memristors have drawn wide attention in recent years as these devices exhibit unique properties which can be used to perform various logic and memory operations. Memristor based memory systems are expected to replace flash memory devices in the near future. In addition, synthesis and optimization of boolean functions using memristors are becoming an important area of research. There are various logic design styles for memristors that have been reported, among which the one that implements material implication operation forms the basis of the present work. An IMPLY gate implements the implication operation, and can be realized using only two memristors and one resistance. In the present work, the widely available synthesis tool ABC is used for synthesizing an arbitrary boolean function into a netlist of IMPLY gates. To optimize the number of memristors to be used for the realization, we propose an INVERSE-IMPLY gate for handling fanouts in the intermediate netlist generated by the ABC tool. Synthesis experiments have been carried out on standard benchmark functions of up to 16 variables, which show an overall improvement of 22.8% in the number of steps required for evaluation over an existing stateof-the-art method. For functions with 9 or more variables, the improvement increases to 35.5%.
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