{"title":"采用0.1µm SiGe BiCMOS技术的55 ghz高效节能四倍频器","authors":"Yi-Shin Yeh, B. Floyd","doi":"10.1109/RFIC.2015.7337756","DOIUrl":null,"url":null,"abstract":"This paper presents a V-band frequency quadrupler in 0.1-μm SiGe BiCMOS technology with 3-dB bandwidth from 44.8 to 57.2 GHz. The circuit employs cascode stacks comprising in-phase class-C common-emitter and anti-phase class-AB cascode devices to obtain current pulses at ×4 frequency. Four such cascodes driven with differential and tunable quadrature increase the 4th harmonic output power while suppressing all other harmonics 22 dB or more. Measurements show >7.4-dBm 4th harmonic output power, and >5.2% power efficiency for the core of the multiplier.","PeriodicalId":121490,"journal":{"name":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 55-GHz power-efficient frequency quadrupler with high harmonic rejection in 0.1-µm SiGe BiCMOS technology\",\"authors\":\"Yi-Shin Yeh, B. Floyd\",\"doi\":\"10.1109/RFIC.2015.7337756\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a V-band frequency quadrupler in 0.1-μm SiGe BiCMOS technology with 3-dB bandwidth from 44.8 to 57.2 GHz. The circuit employs cascode stacks comprising in-phase class-C common-emitter and anti-phase class-AB cascode devices to obtain current pulses at ×4 frequency. Four such cascodes driven with differential and tunable quadrature increase the 4th harmonic output power while suppressing all other harmonics 22 dB or more. Measurements show >7.4-dBm 4th harmonic output power, and >5.2% power efficiency for the core of the multiplier.\",\"PeriodicalId\":121490,\"journal\":{\"name\":\"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2015.7337756\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2015.7337756","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 55-GHz power-efficient frequency quadrupler with high harmonic rejection in 0.1-µm SiGe BiCMOS technology
This paper presents a V-band frequency quadrupler in 0.1-μm SiGe BiCMOS technology with 3-dB bandwidth from 44.8 to 57.2 GHz. The circuit employs cascode stacks comprising in-phase class-C common-emitter and anti-phase class-AB cascode devices to obtain current pulses at ×4 frequency. Four such cascodes driven with differential and tunable quadrature increase the 4th harmonic output power while suppressing all other harmonics 22 dB or more. Measurements show >7.4-dBm 4th harmonic output power, and >5.2% power efficiency for the core of the multiplier.
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