{"title":"可调谐连续时间正交带通δ - σ调制器的设计","authors":"Khaled Sakr, M. Dessouky, A. Zekry","doi":"10.1109/IDT.2011.6123110","DOIUrl":null,"url":null,"abstract":"This paper presents a systematic design technique for a tunable continuous-time quadrature bandpass delta-sigma modulator. The tuning range of the modulator covers from 0.05 to 0.45 of the sampling frequency. The design procedure is applied to the design of a second-order modulator. Results show that the Signal-to-Noise Ratio (SNR) is almost constant and no stability problem occurs over the whole tuning range thanks to a Digital-to-Analog Converter (DAC) compensation scheme.","PeriodicalId":167786,"journal":{"name":"2011 IEEE 6th International Design and Test Workshop (IDT)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of tunable continuous-time quadrature bandpass delta-sigma modulators\",\"authors\":\"Khaled Sakr, M. Dessouky, A. Zekry\",\"doi\":\"10.1109/IDT.2011.6123110\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a systematic design technique for a tunable continuous-time quadrature bandpass delta-sigma modulator. The tuning range of the modulator covers from 0.05 to 0.45 of the sampling frequency. The design procedure is applied to the design of a second-order modulator. Results show that the Signal-to-Noise Ratio (SNR) is almost constant and no stability problem occurs over the whole tuning range thanks to a Digital-to-Analog Converter (DAC) compensation scheme.\",\"PeriodicalId\":167786,\"journal\":{\"name\":\"2011 IEEE 6th International Design and Test Workshop (IDT)\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE 6th International Design and Test Workshop (IDT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IDT.2011.6123110\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 6th International Design and Test Workshop (IDT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IDT.2011.6123110","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of tunable continuous-time quadrature bandpass delta-sigma modulators
This paper presents a systematic design technique for a tunable continuous-time quadrature bandpass delta-sigma modulator. The tuning range of the modulator covers from 0.05 to 0.45 of the sampling frequency. The design procedure is applied to the design of a second-order modulator. Results show that the Signal-to-Noise Ratio (SNR) is almost constant and no stability problem occurs over the whole tuning range thanks to a Digital-to-Analog Converter (DAC) compensation scheme.