高速SAR ADC的设计考虑与评估

2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) Pub Date : 2018-10-01 DOI:10.1109/NORCHIP.2018.8573500

Victor Åberg, C. Fager, L. Svensson

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引用次数: 0

摘要

我们提出了一种异步、交替比较器、800MS/s SAR ADC的设计和评价。比较器使用连续校准来补偿静态输入偏置电压。我们使用测量和行为模型的组合来确定限制性能的两个可能原因;从输出驱动器到输入信号的泄漏，以及比较器中的动态偏移电压。

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Design Considerations and Evaluation of a High-Speed SAR ADC

We present design and evaluation of an asynchronous, alternating-comparator, 800MS/s SAR ADC. The comparators use continuous calibration to compensate for static input offset voltages. We use a combination of measurements and behavioural modelling to identify two possible causes of limited performance; leakage from the output drives onto the input signal, and dynamic offset voltage in the comparators.

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2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)

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