1000BASE-T千兆以太网中DSP实现问题

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) Pub Date : 2001-04-18 DOI:10.1109/VTSA.2001.934495

K. Azadet, E. Haratsch

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引用次数: 10

摘要

这是1000BASE-T教程的第二部分，1000BASE-T是千兆以太网铜缆的物理层。在之前的通信中给出了1000BASE-T标准的一般介绍[Azadet, 1999]。在本文中，我们关注千兆以太网的主要挑战之一:DSP的实现。在介绍了接收机的参考实现之后，我们描述了低功耗数字自适应滤波器架构，以及结合维特比和决策反馈均衡器(DFE)的技术。最后一节研究了Viterbi/DFE联合解码器的关键路径和复杂度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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DSP implementation issues in 1000BASE-T Gigabit Ethernet

This is the second part of a tutorial on 1000BASE-T, physical layer of Gigabit Ethernet over copper. A general presentation of the 1000BASE-T standard was given in a previous communication [Azadet, 1999]. In this paper we focus on one of the main challenges in Gigabit Ethernet: DSP implementation. After presenting a reference implementation of the receiver we describe low-power digital adaptive filter architectures, and techniques for combining Viterbi and Decision Feedback Equalizers (DFE). The last section studies the critical path and complexity of the joint Viterbi/DFE decoder.

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2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517)

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