用振荡试验方法测试低压两级运算放大器

M. Kaur, J. Kaur
{"title":"用振荡试验方法测试低压两级运算放大器","authors":"M. Kaur, J. Kaur","doi":"10.1109/ICSPCOM.2015.7150685","DOIUrl":null,"url":null,"abstract":"Oscillation test methodology (OTM) has been very effective in detecting physical defects such as open, shorts and bridging defects in low-voltage CMOS VLSI analog and mixed signal circuits. This paper discusses the OTM for low voltage two-stage operational amplifier using N-well 1μm CMOS technology with high fault coverage and minimum area overhead. Five bridging faults and one open fault have been detected. Discrete practical realizations and extensive simulations based on CMOS 1μm technology parameters using PSPICE affirm that the test technique presented for MOSFET circuits ensures high fault coverage and requires a negligible area overhead.","PeriodicalId":318875,"journal":{"name":"2015 International Conference on Signal Processing and Communication (ICSC)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Testing of low voltage two stage operational amplifier using oscillation test methodology\",\"authors\":\"M. Kaur, J. Kaur\",\"doi\":\"10.1109/ICSPCOM.2015.7150685\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Oscillation test methodology (OTM) has been very effective in detecting physical defects such as open, shorts and bridging defects in low-voltage CMOS VLSI analog and mixed signal circuits. This paper discusses the OTM for low voltage two-stage operational amplifier using N-well 1μm CMOS technology with high fault coverage and minimum area overhead. Five bridging faults and one open fault have been detected. Discrete practical realizations and extensive simulations based on CMOS 1μm technology parameters using PSPICE affirm that the test technique presented for MOSFET circuits ensures high fault coverage and requires a negligible area overhead.\",\"PeriodicalId\":318875,\"journal\":{\"name\":\"2015 International Conference on Signal Processing and Communication (ICSC)\",\"volume\":\"68 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-03-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 International Conference on Signal Processing and Communication (ICSC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSPCOM.2015.7150685\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International Conference on Signal Processing and Communication (ICSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSPCOM.2015.7150685","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

振荡测试方法(OTM)在检测低压CMOS VLSI模拟和混合信号电路中的开路、短路和桥接缺陷等物理缺陷方面非常有效。本文讨论了采用高故障覆盖率和最小面积开销的n阱1μm CMOS技术的低压两级运算放大器的OTM。检测到5个桥接故障和1个开路故障。基于CMOS 1μm技术参数的离散实际实现和使用PSPICE进行的广泛模拟证实,针对MOSFET电路提出的测试技术可确保高故障覆盖率,并且所需的面积开销可以忽略不计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Testing of low voltage two stage operational amplifier using oscillation test methodology
Oscillation test methodology (OTM) has been very effective in detecting physical defects such as open, shorts and bridging defects in low-voltage CMOS VLSI analog and mixed signal circuits. This paper discusses the OTM for low voltage two-stage operational amplifier using N-well 1μm CMOS technology with high fault coverage and minimum area overhead. Five bridging faults and one open fault have been detected. Discrete practical realizations and extensive simulations based on CMOS 1μm technology parameters using PSPICE affirm that the test technique presented for MOSFET circuits ensures high fault coverage and requires a negligible area overhead.
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