M. Zahid, R. Degraeve, L. Breuil, G. Van den bosch, J. van Houdt
{"title":"混合浮栅闪存高κ间介电堆的不稳定性研究","authors":"M. Zahid, R. Degraeve, L. Breuil, G. Van den bosch, J. van Houdt","doi":"10.1109/IRPS.2013.6532097","DOIUrl":null,"url":null,"abstract":"Scaling of floating gate NAND flash will require switching from conventional control gate wrap-around cells to fully planar memory cells. Due to the low coupling ratio of these cells, a high work function metal on top of Si, together with a high-k Inter-Gate Dielectric (IGD) are required. In this work we study the performance and instability of high-κ IGD, in combination with or without Al<sub>2</sub>O<sub>3</sub> in hybrid floating gate stack for future application in NAND flash memory and compare it to a single Al<sub>2</sub>O<sub>3</sub> IGD. We use Post-Program and Erase discharge to study the program/erase transients as well as the instability. Results show that by replacing single Al<sub>2</sub>O<sub>3</sub> IGD by a low thermal budget HfAlO or by a multilayer IGD combining low-κ / high-κ / low-κ where high-κ is HfO<sub>2</sub> and low-κ is Al<sub>2</sub>O<sub>3</sub> show strong improvement in term of program/erase level and instability, thus a good IGD/CG interface control.","PeriodicalId":138206,"journal":{"name":"2013 IEEE International Reliability Physics Symposium (IRPS)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Instability study of high-κ Inter-Gate Dielectric stacks on hybrid floating gate flash memory\",\"authors\":\"M. Zahid, R. Degraeve, L. Breuil, G. Van den bosch, J. van Houdt\",\"doi\":\"10.1109/IRPS.2013.6532097\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Scaling of floating gate NAND flash will require switching from conventional control gate wrap-around cells to fully planar memory cells. Due to the low coupling ratio of these cells, a high work function metal on top of Si, together with a high-k Inter-Gate Dielectric (IGD) are required. In this work we study the performance and instability of high-κ IGD, in combination with or without Al<sub>2</sub>O<sub>3</sub> in hybrid floating gate stack for future application in NAND flash memory and compare it to a single Al<sub>2</sub>O<sub>3</sub> IGD. We use Post-Program and Erase discharge to study the program/erase transients as well as the instability. Results show that by replacing single Al<sub>2</sub>O<sub>3</sub> IGD by a low thermal budget HfAlO or by a multilayer IGD combining low-κ / high-κ / low-κ where high-κ is HfO<sub>2</sub> and low-κ is Al<sub>2</sub>O<sub>3</sub> show strong improvement in term of program/erase level and instability, thus a good IGD/CG interface control.\",\"PeriodicalId\":138206,\"journal\":{\"name\":\"2013 IEEE International Reliability Physics Symposium (IRPS)\",\"volume\":\"114 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-04-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Reliability Physics Symposium (IRPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.2013.6532097\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Reliability Physics Symposium (IRPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.2013.6532097","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Instability study of high-κ Inter-Gate Dielectric stacks on hybrid floating gate flash memory
Scaling of floating gate NAND flash will require switching from conventional control gate wrap-around cells to fully planar memory cells. Due to the low coupling ratio of these cells, a high work function metal on top of Si, together with a high-k Inter-Gate Dielectric (IGD) are required. In this work we study the performance and instability of high-κ IGD, in combination with or without Al2O3 in hybrid floating gate stack for future application in NAND flash memory and compare it to a single Al2O3 IGD. We use Post-Program and Erase discharge to study the program/erase transients as well as the instability. Results show that by replacing single Al2O3 IGD by a low thermal budget HfAlO or by a multilayer IGD combining low-κ / high-κ / low-κ where high-κ is HfO2 and low-κ is Al2O3 show strong improvement in term of program/erase level and instability, thus a good IGD/CG interface control.