一种带逻辑纠错电路的电平移位器,用于极低压数字CMOS lsi

Yuji Osaki, T. Hirose, N. Kuroki, M. Numa
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引用次数: 11

摘要

本文提出了一种可用于极低压输入的电平移位电路。该电路在电流产生方案中具有独特的特点,通过检测输入和输出逻辑电平来进行逻辑纠错电路。该电路可以将低压输入数字信号转换为高压输出数字信号。该电路实现了低功耗工作,因为它只在输入信号改变时才耗散工作电流。测试结果表明,该电路可以将0.4 V的低压输入信号转换为3v的输出信号。在0.4 v和10 khz输入脉冲下,功耗为58 nW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs
A level shifter circuit capable of extremely low-voltage inputs is presented in this paper. The circuit has a distinctive feature in current generation scheme with logic error correction circuit by detecting input and output logic levels. The proposed circuit can convert low-voltage input digital signals into high-voltage output digital signals. The circuit achieves low-power operation because it dissipates operating current only when the input signals change. Measurement results demonstrated that the circuit can convert low-voltage input signals of 0.4 V into 3 V output signals. The power dissipation was 58 nW at 0.4-V and 10-kHz input pulse.
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