F. Lien, J. Feng, E. Huang, C. Sun, Tao Liu, N. Liao, D. Hightower
{"title":"嵌入式FPGA的硬件/软件解决方案","authors":"F. Lien, J. Feng, E. Huang, C. Sun, Tao Liu, N. Liao, D. Hightower","doi":"10.1109/CICC.2001.929726","DOIUrl":null,"url":null,"abstract":"This paper describes a novel FPGA architecture and related design software for embedding FPGA logic into ASIC designs. The requirements for embedding FPGAs include: fixed pinouts, predictable utilization, predictable and reasonable signal delays, scalability, die size control, and ease of layout. This paper describes Actel's embedded FPGA solution, VariCore/sup TM/.","PeriodicalId":101717,"journal":{"name":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A hardware/software solution for embeddable FPGA\",\"authors\":\"F. Lien, J. Feng, E. Huang, C. Sun, Tao Liu, N. Liao, D. Hightower\",\"doi\":\"10.1109/CICC.2001.929726\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a novel FPGA architecture and related design software for embedding FPGA logic into ASIC designs. The requirements for embedding FPGAs include: fixed pinouts, predictable utilization, predictable and reasonable signal delays, scalability, die size control, and ease of layout. This paper describes Actel's embedded FPGA solution, VariCore/sup TM/.\",\"PeriodicalId\":101717,\"journal\":{\"name\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-05-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2001.929726\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2001.929726","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper describes a novel FPGA architecture and related design software for embedding FPGA logic into ASIC designs. The requirements for embedding FPGAs include: fixed pinouts, predictable utilization, predictable and reasonable signal delays, scalability, die size control, and ease of layout. This paper describes Actel's embedded FPGA solution, VariCore/sup TM/.