M. Si, Chunsheng Jiang, C. Su, Y. Tang, Lingming Yang, W. Chung, Muhammad A. Alam, Peide D. Ye
{"title":"低于60 mV/dec的铁电HZO MoS2负电容场效应晶体管,内部金属栅极:寄生电容的作用","authors":"M. Si, Chunsheng Jiang, C. Su, Y. Tang, Lingming Yang, W. Chung, Muhammad A. Alam, Peide D. Ye","doi":"10.1109/IEDM.2017.8268447","DOIUrl":null,"url":null,"abstract":"Steep-slope MoS2 NC-FETs with ferroelectric HZO and internal metal gate in the gate dielectric stack are demonstrated. SS less than 50 mV/dec is obtained for both forward and reverse gate voltage sweeps, with minimum SSfor = 37.6 mV/dec and minimum SSRev = 42.2 mV/dec. A second minimum of SSrev as low as 8.3 mV/dec can be measured as the result of dynamic switching at high speed in ferroelectric HZO. The impact of parasitic capacitance on SS and dynamic hysteresis is systematically studied by both experiment and dynamic simulation.","PeriodicalId":412333,"journal":{"name":"2017 IEEE International Electron Devices Meeting (IEDM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"33","resultStr":"{\"title\":\"Sub-60 mV/dec ferroelectric HZO MoS2 negative capacitance field-effect transistor with internal metal gate: The role of parasitic capacitance\",\"authors\":\"M. Si, Chunsheng Jiang, C. Su, Y. Tang, Lingming Yang, W. Chung, Muhammad A. Alam, Peide D. Ye\",\"doi\":\"10.1109/IEDM.2017.8268447\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Steep-slope MoS2 NC-FETs with ferroelectric HZO and internal metal gate in the gate dielectric stack are demonstrated. SS less than 50 mV/dec is obtained for both forward and reverse gate voltage sweeps, with minimum SSfor = 37.6 mV/dec and minimum SSRev = 42.2 mV/dec. A second minimum of SSrev as low as 8.3 mV/dec can be measured as the result of dynamic switching at high speed in ferroelectric HZO. The impact of parasitic capacitance on SS and dynamic hysteresis is systematically studied by both experiment and dynamic simulation.\",\"PeriodicalId\":412333,\"journal\":{\"name\":\"2017 IEEE International Electron Devices Meeting (IEDM)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"33\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE International Electron Devices Meeting (IEDM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2017.8268447\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2017.8268447","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Sub-60 mV/dec ferroelectric HZO MoS2 negative capacitance field-effect transistor with internal metal gate: The role of parasitic capacitance
Steep-slope MoS2 NC-FETs with ferroelectric HZO and internal metal gate in the gate dielectric stack are demonstrated. SS less than 50 mV/dec is obtained for both forward and reverse gate voltage sweeps, with minimum SSfor = 37.6 mV/dec and minimum SSRev = 42.2 mV/dec. A second minimum of SSrev as low as 8.3 mV/dec can be measured as the result of dynamic switching at high speed in ferroelectric HZO. The impact of parasitic capacitance on SS and dynamic hysteresis is systematically studied by both experiment and dynamic simulation.