模拟实际内存模块测试板上测量DDR2-SDRAM Vref噪声容限的方法

Y. Uematsu, H. Osaka, Y. Nishio, S. Hatano
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引用次数: 1

摘要

为了以低成本和高噪声容限实现双数据速率同步DRAM (DDR-SDRAM),通过设置适当的Vref目标阻抗,我们在模拟实际内存模块的测试板上建立了DDR2-SDRAM的Vref噪声容限测量装置,并测量了各项性能。测量的Vref噪声容限具有较强的频率依赖性;频率越高,噪声容忍度越大。我们认为这是因为在测试芯片上的固有低通滤波器由片上电子元件组成。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Method for Measuring Vref Noise Tolerance of DDR2-SDRAM on Test Board Simulatig Actual Memory Module
Aiming to achieve double data rate-synchronous DRAM (DDR-SDRAM) at low-cost and with high noise tolerance by setting adequate Vref target impedance, we have established a measurement setup for Vref noise tolerance of DDR2-SDRAM on test board simulating actual memory module and measured various properties. The measured Vref noise tolerance has strong frequency-dependency; the higher the frequency, the larger the noise tolerance. We believe that this is because the intrinsic low pass filter consisted of on-chip electrical components in the test chip.
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