全铜金属化技术对功率器件效率的影响

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI:10.1109/ISPSD.1999.764053

E. Kobori, N. Izumi, N. Kumamoto, Y. Hamazawa, M. Matsumoto, K. Yamamoto, A. Kamisawa

{"title":"全铜金属化技术对功率器件效率的影响","authors":"E. Kobori, N. Izumi, N. Kumamoto, Y. Hamazawa, M. Matsumoto, K. Yamamoto, A. Kamisawa","doi":"10.1109/ISPSD.1999.764053","DOIUrl":null,"url":null,"abstract":"This paper describes some advantages of Cu dual damascene structures for power LSI devices. By using the Cu process, a lower value of V/sub sat/ was obtained than that using Al-Si-Cu wiring. The lifetime of Cu lines was about 10 times longer than when using Al-Cu lines. The on-resistance of DMOS is reduced by as much as 31% when using the Cu process.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Efficiency of power devices using full Cu metallization technologies\",\"authors\":\"E. Kobori, N. Izumi, N. Kumamoto, Y. Hamazawa, M. Matsumoto, K. Yamamoto, A. Kamisawa\",\"doi\":\"10.1109/ISPSD.1999.764053\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes some advantages of Cu dual damascene structures for power LSI devices. By using the Cu process, a lower value of V/sub sat/ was obtained than that using Al-Si-Cu wiring. The lifetime of Cu lines was about 10 times longer than when using Al-Cu lines. The on-resistance of DMOS is reduced by as much as 31% when using the Cu process.\",\"PeriodicalId\":352185,\"journal\":{\"name\":\"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-05-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.1999.764053\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1999.764053","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

本文介绍了用于大功率大规模集成电路器件的铜双大马士革结构的优点。采用Cu线法得到的V/sub /比采用Al-Si-Cu线法得到的V/sub /要低。Cu线的寿命是Al-Cu线的10倍左右。当采用Cu工艺时，DMOS的导通电阻降低了31%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Efficiency of power devices using full Cu metallization technologies

This paper describes some advantages of Cu dual damascene structures for power LSI devices. By using the Cu process, a lower value of V/sub sat/ was obtained than that using Al-Si-Cu wiring. The lifetime of Cu lines was about 10 times longer than when using Al-Cu lines. The on-resistance of DMOS is reduced by as much as 31% when using the Cu process.

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11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)

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