高速算法的最佳类数组结构

D. Agrawal
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引用次数: 5

摘要

本文描述了用于高速乘法、除法、平方和平方根运算的类数组结构。在这些设计中,除法和平方根运算的时间已接近于乘法运算的时间。从速度和通用性的角度来看,这些结构是最佳的。文献中描述的大多数蜂窝阵列都相当慢。在除法和平方根运算中,由于进位的涟漪效应,时间延迟尤为显著。虽然免进位技术已被广泛用于乘法运算,但直到最近才被Cappa等人用于设计非恢复分频器阵列。这需要符号位检测,使数组不均匀。这样的数组被命名为类数组结构。为了恢复除法运算,本文对进位法进行了扩展。由于信号检测和溢流校正的要求,恢复方法略复杂。但是这种恢复数组的主要优点在于它对乘法运算的简单扩展。用于这两个操作的阵列,在流水线化时,将比所有其他乘除器阵列具有更强的计算能力。还提出了进一步提高速度的建议。除法运算的技术同样适用于求平方根,并给出了求平方根运算的数组结构。要执行这四种操作中的任何一种,唯一要做的操作就是将两个数组组合起来;一个用于乘法除法,另一个用于平方根。指出了组合这两种阵列的可能方法,并提到了它们的相对优点和缺点。最后,给出了一个具有完整内部细节和4位操作的广义管道数组结构。本文还考虑了不同阵列大规模集成的可能性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Optimum array-like structures for high-speed arithmetic
Array-like structures for high-speed multiplication, division, square and square-root operations have been described in this paper. In these designs the division and square-rooting time have been made to approach to that of multiplication operation. These structures are optimum from speed and versatility point of view. Most of the cellular arrays described in the literature are adequately slow. The time delay is particularly significant in the division and square-rooting operations due to the ripple effect of the carries. Though the carry-save technique has been widely utilized for multiplication operation, it has been only recently employed by Cappa et. al. in the design of a non-restoring divider array. This requires sign-bit detection that makes the array non-uniform. Such an array has been named as an array-like structure. The carry-save method has been extended here for restoring division operation. Due to sign-detection and overflow correction requirements, the restoring method is slightly complex. But the main advantage of such restoring array is in its simple extension for multiplication operation. The array for the two operations, when pipelined, will have more computing power than all other multiplier-divider arrays. Suggestions have also been included for further speed improvement. The technique applied for division operation is as well applicable for the square-rooting and an array-like structure for square-square-rooting operations has also been given. For performing any one of the four operations, the only manipulation to be done is to combine the two arrays; one for multiplication-division and another for square-square-rooting. Possible methods of combining the two arrays have been indicated and their relative advantages and disadvantages have been mentioned. Finally, a generalized pipeline array-like structure with complete internal details and for 4-bit operation, has been shown. Due consideration has also been given to the possibility of large-scale-integration of different arrays presented in this paper.
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