An Enhanced SSCP for Frequency Drift Suppressing in SSPLL

An enhanced Sub-Sampling Charge Pump (SSCP) for suppressing the frequency drift of Sub-sampling Phase-Locked Loop (SSPLL) is proposed. The enhanced SSCP consists an input stage, the current mirrors, and an output stage for selecting the effective period, which is highlighted in this paper. The function of the SSCP is to convert the voltage sampled by the Sub-Sampling Phase Detector (SSPD) into current signal and then charge the Loop Filter (LF). Unlike the traditional SSCP, whose output stage is a simple switch array, the proposed SSCP output stage includes a capacitor and customized switches. By charging the capacitor and then charging the LF by the capacitor, the deviation of the output voltage existed at the rising edge of the reference clock is eliminated, thus the frequency drift is suppressed. To verify the advantages of the proposed SSCP, a complete Phase-Locked Loop (PLL) based on 180nm process was built. The simulated phase noise of the SSPD and the SSCP is -201dBc/Hz@1MHz.