An 8-bit 20 MS/s CMOS A/D converter with 59 mW power consumption

(MSjs) CMOS AjD con­ verter with SO-mW power consumption has been integrated into an area of 2.09 mm X 2.15 mm. The characteristics of low power consumption and small chip area have been achieved by introducing a new architecture to a subranging AjD converter. In this architecture, both coarse and fine AjD conversions can be accomplished in a unique circuit. Consequently, a large number of comparators and processing circuits for comparison results have been removed from the conventional subranging AjD converter. This arch itecture has been realized by the introduction of a new chopper-type comparator with three input terminals. This comparator makes both coarse and fine comparisons by itself with its sample-and-hold function. The AjD converter has two 8-bit sub-AjD converters which employ this new archi­ tecture, and they are pipelined to improve thc conversion rate. The experimental results have shown good performances. Both the differential and the integral nonlinearity are less than ±O.S LSB at a 2O-MSjs sampling frequency. The effective resolution at 20-MSjs sampling fre­ quency is 7.4 bits at a 1.97-MHz input frequency and 6.7 bits at a 9.79-MHz input frequency. The AjD converter has been fabricated in a I-I'm CMOS technology.