{"title":"片上亚纳秒级信号捕获和表征电路","authors":"N. Abaskharoun, G. Roberts","doi":"10.1109/CICC.2001.929766","DOIUrl":null,"url":null,"abstract":"Two circuits for performing on-chip subnanosecond signal measurements are presented. The first is an on-chip digitizer capable of capturing high-bandwidth arbitrary periodic signals, The second is a specialized jitter measurement structure based on a Time-to-Digital Converter (TDC). Both circuits were successfully implemented in a 0.35 /spl mu/m CMOS process. The digitizer is capable of capturing signals at an effective sampling rate of 1.6 GWz, while the jitter measurement device can measure jitter with an 18 ps resolution.","PeriodicalId":101717,"journal":{"name":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","volume":"354 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":"{\"title\":\"Circuits for on-chip sub-nanosecond signal capture and characterization\",\"authors\":\"N. Abaskharoun, G. Roberts\",\"doi\":\"10.1109/CICC.2001.929766\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two circuits for performing on-chip subnanosecond signal measurements are presented. The first is an on-chip digitizer capable of capturing high-bandwidth arbitrary periodic signals, The second is a specialized jitter measurement structure based on a Time-to-Digital Converter (TDC). Both circuits were successfully implemented in a 0.35 /spl mu/m CMOS process. The digitizer is capable of capturing signals at an effective sampling rate of 1.6 GWz, while the jitter measurement device can measure jitter with an 18 ps resolution.\",\"PeriodicalId\":101717,\"journal\":{\"name\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"volume\":\"354 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-05-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"38\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2001.929766\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2001.929766","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Circuits for on-chip sub-nanosecond signal capture and characterization
Two circuits for performing on-chip subnanosecond signal measurements are presented. The first is an on-chip digitizer capable of capturing high-bandwidth arbitrary periodic signals, The second is a specialized jitter measurement structure based on a Time-to-Digital Converter (TDC). Both circuits were successfully implemented in a 0.35 /spl mu/m CMOS process. The digitizer is capable of capturing signals at an effective sampling rate of 1.6 GWz, while the jitter measurement device can measure jitter with an 18 ps resolution.