2.4GHz CMOS差分LNA的设计

2013 IEEE International Conference of Electron Devices and Solid-state Circuits Pub Date : 2013-06-03 DOI:10.1109/EDSSC.2013.6628125

M. Muhamad, N. Soin, H. Ramiah, N. Noh, W. Chong

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引用次数: 14

摘要

本文提出了一种利用电感退化共源(CS)开漏级联电路拓扑结构的差分低噪声放大器的设计与仿真。设计的工作频率为2.4GHz，符合IEEE 802.11b标准。LNA已在RF 0.13um CMOS工艺中实现。采用功率约束噪声优化方法，获得了具有低噪声系数和良好功率增益的晶体管的最优宽度。后布局仿真的正向增益(S21)为18.56dB, S11为-27.63dB，噪声系数(NF)为1.85dB, IIP3 = -7.75。电路消耗的总电流为7.59mA，因此功耗为9mW。

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Design of CMOS differential LNA at 2.4GHz

This paper present design and simulation of differential low noise amplifier that utilized inductively degenerated common-source (CS) open drain cascode topology. The operating frequency for the design was at 2.4GHz for IEEE 802.11b standard. The LNA has been implemented in RF 0.13um CMOS process. Power constraint noise optimization method has been used to obtain the optimized width of the transistor with a low noise figure and good power gain. Post layout simulation provides a forward gain (S21) of 18.56dB, S11 of -27.63dB with a noise figure (NF) of 1.85dB and IIP3 = -7.75. The total current consumed by the circuit is 7.59mA thus making the power consumption is 9mW.

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2013 IEEE International Conference of Electron Devices and Solid-state Circuits

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