结构化ASIC教程:器件和设计流程的基本信息(工业教程)

C. Hecker, D. Amos
{"title":"结构化ASIC教程:器件和设计流程的基本信息(工业教程)","authors":"C. Hecker, D. Amos","doi":"10.1109/DATE.2004.1268813","DOIUrl":null,"url":null,"abstract":"ISSP (Instant Solution Silicon Platform), the leading Structured ASIC Technology, was of great interest when introduced by NEC Electronics at DATE 2003. Now this tutorial will give you all the essential information required to judge the competitive advantage that using Structured ASIC can give you in your next project. ISSP devices are mask-programmed to your specification with very low NRE costs and short lead time. The Design is implemented through the optimised and dedicated synthesis technology of Synplicity's Synplify ASIC tool. This tutorial shows how you can use either your ASIC or FPGA expertise to use ISSP without excessive tool costs or massive retraining. Despite rumours of their demise, domino circuits are still indispensable in the design of high speed CMOS chips because they offer a 1.5-2x performance advantage over static logic. This tutorial briefly reviews basic dominio design issues, then compares and contrasts a wide variety of high-performance domino and nonmonotonic dynamic sequencing techniques. It then details the domino methodology used on the Itanium 2 microprocessors and explores pitfalls discovered during silicon debug. This tutorial is intended for circuit, logic, CAD, and test engineers interested in high-performance domino design.","PeriodicalId":335658,"journal":{"name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-03-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Stuctured ASIC tutorial: essential information on devices and design flow (industrial tutorial)\",\"authors\":\"C. Hecker, D. Amos\",\"doi\":\"10.1109/DATE.2004.1268813\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"ISSP (Instant Solution Silicon Platform), the leading Structured ASIC Technology, was of great interest when introduced by NEC Electronics at DATE 2003. Now this tutorial will give you all the essential information required to judge the competitive advantage that using Structured ASIC can give you in your next project. ISSP devices are mask-programmed to your specification with very low NRE costs and short lead time. The Design is implemented through the optimised and dedicated synthesis technology of Synplicity's Synplify ASIC tool. This tutorial shows how you can use either your ASIC or FPGA expertise to use ISSP without excessive tool costs or massive retraining. Despite rumours of their demise, domino circuits are still indispensable in the design of high speed CMOS chips because they offer a 1.5-2x performance advantage over static logic. This tutorial briefly reviews basic dominio design issues, then compares and contrasts a wide variety of high-performance domino and nonmonotonic dynamic sequencing techniques. It then details the domino methodology used on the Itanium 2 microprocessors and explores pitfalls discovered during silicon debug. This tutorial is intended for circuit, logic, CAD, and test engineers interested in high-performance domino design.\",\"PeriodicalId\":335658,\"journal\":{\"name\":\"Proceedings Design, Automation and Test in Europe Conference and Exhibition\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-03-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Design, Automation and Test in Europe Conference and Exhibition\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DATE.2004.1268813\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DATE.2004.1268813","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

ISSP(即时解决方案硅平台)是领先的结构化ASIC技术,当NEC电子在2003年DATE上介绍时引起了极大的兴趣。现在,本教程将为您提供所有必要的信息,以判断使用结构化ASIC可以在您的下一个项目中给您带来的竞争优势。ISSP设备按您的规格进行掩码编程,具有非常低的NRE成本和较短的交货时间。该设计是通过Synplicity的Synplify ASIC工具的优化和专用合成技术实现的。本教程展示了如何使用您的ASIC或FPGA专业知识来使用ISSP,而无需过多的工具成本或大规模的再培训。尽管有传言说多米诺电路已经消亡,但在高速CMOS芯片的设计中,多米诺电路仍然是不可或缺的,因为它们比静态逻辑提供1.5-2倍的性能优势。本教程简要回顾了基本的domino设计问题,然后比较和对比了各种高性能domino和非单调动态排序技术。然后详细介绍了在Itanium 2微处理器上使用的domino方法,并探讨了在硅调试过程中发现的缺陷。本教程适用于对高性能domino设计感兴趣的电路、逻辑、CAD和测试工程师。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Stuctured ASIC tutorial: essential information on devices and design flow (industrial tutorial)
ISSP (Instant Solution Silicon Platform), the leading Structured ASIC Technology, was of great interest when introduced by NEC Electronics at DATE 2003. Now this tutorial will give you all the essential information required to judge the competitive advantage that using Structured ASIC can give you in your next project. ISSP devices are mask-programmed to your specification with very low NRE costs and short lead time. The Design is implemented through the optimised and dedicated synthesis technology of Synplicity's Synplify ASIC tool. This tutorial shows how you can use either your ASIC or FPGA expertise to use ISSP without excessive tool costs or massive retraining. Despite rumours of their demise, domino circuits are still indispensable in the design of high speed CMOS chips because they offer a 1.5-2x performance advantage over static logic. This tutorial briefly reviews basic dominio design issues, then compares and contrasts a wide variety of high-performance domino and nonmonotonic dynamic sequencing techniques. It then details the domino methodology used on the Itanium 2 microprocessors and explores pitfalls discovered during silicon debug. This tutorial is intended for circuit, logic, CAD, and test engineers interested in high-performance domino design.
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