{"title":"基于二次偏置的正弦波算法及其FPGA实现","authors":"Xie Bao-zhong, Chen Tiequn","doi":"10.1109/ICEMI.2011.6037881","DOIUrl":null,"url":null,"abstract":"Sine function is widely used in many modern application fields. Many schemes were proposed to generate sine wave. Among the methods Look-Up Table is the simplest and fastest one. Many efforts have been carried out to reduce the memory size of the LUT. In this paper comparison among offsets of 1st, 2nd, 3rd and 4th is executed to search the best one. A Direct Digital Frequency Synthesizer (DDFS) was designed to verify the proposed 2nd offset sine algorithm using Field Programmable Gates Array (FPGA), Digital to Analog Converter and low pass filter. The experiment demonstrates that 2nd offset sine algorithm can reduce the memory size greatly.","PeriodicalId":321964,"journal":{"name":"IEEE 2011 10th International Conference on Electronic Measurement & Instruments","volume":"99 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Sine wave algorithm based on 2nd offset and its implementation in FPGA\",\"authors\":\"Xie Bao-zhong, Chen Tiequn\",\"doi\":\"10.1109/ICEMI.2011.6037881\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Sine function is widely used in many modern application fields. Many schemes were proposed to generate sine wave. Among the methods Look-Up Table is the simplest and fastest one. Many efforts have been carried out to reduce the memory size of the LUT. In this paper comparison among offsets of 1st, 2nd, 3rd and 4th is executed to search the best one. A Direct Digital Frequency Synthesizer (DDFS) was designed to verify the proposed 2nd offset sine algorithm using Field Programmable Gates Array (FPGA), Digital to Analog Converter and low pass filter. The experiment demonstrates that 2nd offset sine algorithm can reduce the memory size greatly.\",\"PeriodicalId\":321964,\"journal\":{\"name\":\"IEEE 2011 10th International Conference on Electronic Measurement & Instruments\",\"volume\":\"99 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE 2011 10th International Conference on Electronic Measurement & Instruments\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEMI.2011.6037881\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 2011 10th International Conference on Electronic Measurement & Instruments","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEMI.2011.6037881","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Sine wave algorithm based on 2nd offset and its implementation in FPGA
Sine function is widely used in many modern application fields. Many schemes were proposed to generate sine wave. Among the methods Look-Up Table is the simplest and fastest one. Many efforts have been carried out to reduce the memory size of the LUT. In this paper comparison among offsets of 1st, 2nd, 3rd and 4th is executed to search the best one. A Direct Digital Frequency Synthesizer (DDFS) was designed to verify the proposed 2nd offset sine algorithm using Field Programmable Gates Array (FPGA), Digital to Analog Converter and low pass filter. The experiment demonstrates that 2nd offset sine algorithm can reduce the memory size greatly.