WASP设备的接口设计优化

1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration Pub Date : 1993-01-20 DOI:10.1109/ICWSI.1993.255256

H. Bolouri, M. Hussaini, S. Hedge, R. Lea

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引用次数: 3

摘要

详细介绍了在晶圆规模集成(WSI)关联串处理器(WASP)器件的晶圆接口块中所采用的缺陷和容错策略。提出了一种结构化的冗余路径容错信号分配网络设计与优化方法。利用蒙特卡罗模拟分析了在随机分布缺陷存在的情况下，各种WASP信号分布网络拓扑的成功率。结果表明，所提出的信号分配策略能够很好地实现运行故障后的高速恢复

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Interface design optimisation for WASP devices

Details of defect and fault tolerance strategies used in the wafer interface blocks of wafer scale integration (WSI) associative string processor (WASP) devices are given. A structured approach to the design and optimization of redundant-path defect- and fault-tolerant signal distribution networks is presented. Monte Carlo simulations are used to analyze the success rate of various WASP signal distribution network topologies in the presence of randomly distributed defects. It is shown that the proposed signal distribution strategy lends itself well to high-speed recovery from in-operation failures.<>

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1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration

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