电路可靠性预测:器件时变特性障碍的挑战和解决方案

2021 IEEE Latin America Electron Devices Conference (LAEDC) Pub Date : 2021-04-19 DOI:10.1109/LAEDC51812.2021.9437920

M. Nafria, J. Diaz-Fortuny, P. Saraza-Canflanca, J. Martín-Martínez, E. Roca, R. Castro-López, R. Rodríguez, P. Martín-Lloret, A. Toro-Frías, D. Mateo, E. Barajas, X. Aragonès, F. Fernández

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引用次数: 1

摘要

MOSFET时相关可变性(TDV)的表征可以成为高级CMOS节点中可靠性感知电路设计的展示器。在这项工作中，在基于物理的TDV紧凑模型的背景下，提出了一个完整的MOSFET表征流程，该流程解决了在设计时准确预测电路可靠性的主要TDV表征挑战。通过示例描述和说明了这种方法的支柱。

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Circuit reliability prediction: challenges and solutions for the device time-dependent variability characterization roadblock

The characterization of the MOSFET Time-Dependent Variability (TDV) can be a showstopper for reliability-aware circuit design in advanced CMOS nodes. In this work, a complete MOSFET characterization flow is presented, in the context of a physics-based TDV compact model, that addresses the main TDV characterization challenges for accurate circuit reliability prediction at design time. The pillars of this approach are described and illustrated through examples.

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2021 IEEE Latin America Electron Devices Conference (LAEDC)

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