K. Van Schuylenbergh, B. Griffiths, C. Chua, D. Fork, J. Lu
{"title":"具有集成三维电感的低噪声单片振荡器","authors":"K. Van Schuylenbergh, B. Griffiths, C. Chua, D. Fork, J. Lu","doi":"10.1109/ISSCC.2003.1234351","DOIUrl":null,"url":null,"abstract":"A balanced silicon BiCMOS oscillator using self-assembled curled circular spring 3D inductor with peak Q of 40 reduces phase noise by 12.3dB at 100kHz offset compared to conventional planar spiral inductor approach. The addition of a 5/spl mu/m copper underlayer raises Q to 85.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"Low-noise monolithic oscillator with an integrated three-dimensional inductor\",\"authors\":\"K. Van Schuylenbergh, B. Griffiths, C. Chua, D. Fork, J. Lu\",\"doi\":\"10.1109/ISSCC.2003.1234351\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A balanced silicon BiCMOS oscillator using self-assembled curled circular spring 3D inductor with peak Q of 40 reduces phase noise by 12.3dB at 100kHz offset compared to conventional planar spiral inductor approach. The addition of a 5/spl mu/m copper underlayer raises Q to 85.\",\"PeriodicalId\":171288,\"journal\":{\"name\":\"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-02-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2003.1234351\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2003.1234351","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low-noise monolithic oscillator with an integrated three-dimensional inductor
A balanced silicon BiCMOS oscillator using self-assembled curled circular spring 3D inductor with peak Q of 40 reduces phase noise by 12.3dB at 100kHz offset compared to conventional planar spiral inductor approach. The addition of a 5/spl mu/m copper underlayer raises Q to 85.