利用层状半导体的机械和等离子体诱导变形制备多比特存储器

Mikai Chen, Xiaogan Liang
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引用次数: 0

摘要

为了实现基于硬件的人工智能(AI)系统的实际应用,有必要创建具有多个(或模拟可调)持久记忆状态的新存储设备。[1]在我们的工作中,我们发现层状半导体中的层间变形可以形成多个持久的、亚稳态的电荷捕获状态,这可以用来制造具有多比特数据存储状态的存储晶体管。我们已经证明,等离子体处理和机械剪切剥离都可以用来产生这种电荷捕获状态,并且制备的MoS2和WSe2存储晶体管分别具有2位和3位的数据存储状态,其保留时间分别为一年和一天。这项工作为控制层状材料中的电荷存储状态和生产多比特存储元件提供了科学和技术知识。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Multi-bit memories fabricated through mechanical and plasma induced deformation of layered semiconductors
To realize hardware-based artificial intelligence (AI) systems for practical applications, it is necessary to create new memory devices with multiple (or analog-tunable) long-lasting memory states.[1] In our work, we identify that the interlayer deformation in layered semiconductors can form multiple long-lasting, metastable charge-trapping states, which can be exploited to fabricate memory transistors with multi-bit data storage states. We have demonstrated that both plasma treatment and mechanical shear exfoliation can be used to generate such charge-trapping states, and the fabricated MoS2 and WSe2 memory transistors have 2-bit and 3-bit data storage states with year- and day-scale retention times, respectively. This work advances the scientific and technical knowledge for manipulating charge memory states in layered materials and producing multi-bit memory components.
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