{"title":"利用层状半导体的机械和等离子体诱导变形制备多比特存储器","authors":"Mikai Chen, Xiaogan Liang","doi":"10.1109/NANO.2017.8117396","DOIUrl":null,"url":null,"abstract":"To realize hardware-based artificial intelligence (AI) systems for practical applications, it is necessary to create new memory devices with multiple (or analog-tunable) long-lasting memory states.[1] In our work, we identify that the interlayer deformation in layered semiconductors can form multiple long-lasting, metastable charge-trapping states, which can be exploited to fabricate memory transistors with multi-bit data storage states. We have demonstrated that both plasma treatment and mechanical shear exfoliation can be used to generate such charge-trapping states, and the fabricated MoS2 and WSe2 memory transistors have 2-bit and 3-bit data storage states with year- and day-scale retention times, respectively. This work advances the scientific and technical knowledge for manipulating charge memory states in layered materials and producing multi-bit memory components.","PeriodicalId":292399,"journal":{"name":"2017 IEEE 17th International Conference on Nanotechnology (IEEE-NANO)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multi-bit memories fabricated through mechanical and plasma induced deformation of layered semiconductors\",\"authors\":\"Mikai Chen, Xiaogan Liang\",\"doi\":\"10.1109/NANO.2017.8117396\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To realize hardware-based artificial intelligence (AI) systems for practical applications, it is necessary to create new memory devices with multiple (or analog-tunable) long-lasting memory states.[1] In our work, we identify that the interlayer deformation in layered semiconductors can form multiple long-lasting, metastable charge-trapping states, which can be exploited to fabricate memory transistors with multi-bit data storage states. We have demonstrated that both plasma treatment and mechanical shear exfoliation can be used to generate such charge-trapping states, and the fabricated MoS2 and WSe2 memory transistors have 2-bit and 3-bit data storage states with year- and day-scale retention times, respectively. This work advances the scientific and technical knowledge for manipulating charge memory states in layered materials and producing multi-bit memory components.\",\"PeriodicalId\":292399,\"journal\":{\"name\":\"2017 IEEE 17th International Conference on Nanotechnology (IEEE-NANO)\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE 17th International Conference on Nanotechnology (IEEE-NANO)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NANO.2017.8117396\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE 17th International Conference on Nanotechnology (IEEE-NANO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2017.8117396","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multi-bit memories fabricated through mechanical and plasma induced deformation of layered semiconductors
To realize hardware-based artificial intelligence (AI) systems for practical applications, it is necessary to create new memory devices with multiple (or analog-tunable) long-lasting memory states.[1] In our work, we identify that the interlayer deformation in layered semiconductors can form multiple long-lasting, metastable charge-trapping states, which can be exploited to fabricate memory transistors with multi-bit data storage states. We have demonstrated that both plasma treatment and mechanical shear exfoliation can be used to generate such charge-trapping states, and the fabricated MoS2 and WSe2 memory transistors have 2-bit and 3-bit data storage states with year- and day-scale retention times, respectively. This work advances the scientific and technical knowledge for manipulating charge memory states in layered materials and producing multi-bit memory components.