R. Joshi, W. Hwang, S. Wilson, G. Shahidi, C. Chuang
{"title":"在1.8 V, 0.25 /spl mu/m CMOS体和SOI技术中实现高速多端口寄存器文件","authors":"R. Joshi, W. Hwang, S. Wilson, G. Shahidi, C. Chuang","doi":"10.1109/VTSA.1999.786053","DOIUrl":null,"url":null,"abstract":"The experimental hardware results of a high speed 8-port, 32 word/spl times/64-bit register file in 1.8 V, 0.25 /spl mu/m CMOS bulk and SOI silicon technology are presented. Such a register file is designed for bulk technology but is also remapped and fabricated in SOI technology without any body contacts. It is shown that the register file in SOI achieves more than 20% performance gain over the counterpart.","PeriodicalId":237214,"journal":{"name":"1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Implementation of a high speed multiport register file in a 1.8 V, 0.25 /spl mu/m CMOS bulk and SOI technology\",\"authors\":\"R. Joshi, W. Hwang, S. Wilson, G. Shahidi, C. Chuang\",\"doi\":\"10.1109/VTSA.1999.786053\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The experimental hardware results of a high speed 8-port, 32 word/spl times/64-bit register file in 1.8 V, 0.25 /spl mu/m CMOS bulk and SOI silicon technology are presented. Such a register file is designed for bulk technology but is also remapped and fabricated in SOI technology without any body contacts. It is shown that the register file in SOI achieves more than 20% performance gain over the counterpart.\",\"PeriodicalId\":237214,\"journal\":{\"name\":\"1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTSA.1999.786053\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTSA.1999.786053","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of a high speed multiport register file in a 1.8 V, 0.25 /spl mu/m CMOS bulk and SOI technology
The experimental hardware results of a high speed 8-port, 32 word/spl times/64-bit register file in 1.8 V, 0.25 /spl mu/m CMOS bulk and SOI silicon technology are presented. Such a register file is designed for bulk technology but is also remapped and fabricated in SOI technology without any body contacts. It is shown that the register file in SOI achieves more than 20% performance gain over the counterpart.