{"title":"神经形态学习回路中对缺陷忆阻器的耐受性","authors":"C. Yakopcic, Raqibul Hasan, T. Taha","doi":"10.1109/NAECON.2014.7045810","DOIUrl":null,"url":null,"abstract":"This paper describes a memristor based neuromorphic circuit that is capable of learning. Target memristors within the crossbar circuit were set to be stuck in either high or low resistance states to observe fault tolerance within the memristor crossbar. The simulations are carried out in SPICE using a detailed memristor model so that the crossbar is simulated as accurately as possible. In some cases the circuit was able to successfully learn when half of the memristors in the crossbar were set to be defective. Due to additional bias circuitry, this neuromorphic memristive learning circuit appears to be more tolerant to error than alternative designs.","PeriodicalId":318539,"journal":{"name":"NAECON 2014 - IEEE National Aerospace and Electronics Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Tolerance to defective memristors in a neuromorphic learning circuit\",\"authors\":\"C. Yakopcic, Raqibul Hasan, T. Taha\",\"doi\":\"10.1109/NAECON.2014.7045810\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a memristor based neuromorphic circuit that is capable of learning. Target memristors within the crossbar circuit were set to be stuck in either high or low resistance states to observe fault tolerance within the memristor crossbar. The simulations are carried out in SPICE using a detailed memristor model so that the crossbar is simulated as accurately as possible. In some cases the circuit was able to successfully learn when half of the memristors in the crossbar were set to be defective. Due to additional bias circuitry, this neuromorphic memristive learning circuit appears to be more tolerant to error than alternative designs.\",\"PeriodicalId\":318539,\"journal\":{\"name\":\"NAECON 2014 - IEEE National Aerospace and Electronics Conference\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"NAECON 2014 - IEEE National Aerospace and Electronics Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NAECON.2014.7045810\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"NAECON 2014 - IEEE National Aerospace and Electronics Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.2014.7045810","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Tolerance to defective memristors in a neuromorphic learning circuit
This paper describes a memristor based neuromorphic circuit that is capable of learning. Target memristors within the crossbar circuit were set to be stuck in either high or low resistance states to observe fault tolerance within the memristor crossbar. The simulations are carried out in SPICE using a detailed memristor model so that the crossbar is simulated as accurately as possible. In some cases the circuit was able to successfully learn when half of the memristors in the crossbar were set to be defective. Due to additional bias circuitry, this neuromorphic memristive learning circuit appears to be more tolerant to error than alternative designs.
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