减少先进300mm半导体生产线的光刻面积周期时间

The 17th Annual SEMI/IEEE ASMC 2006 Conference Pub Date : 2006-05-22 DOI:10.1109/ASMC.2006.1638734

J. P. van der Eerden, T. Saenger, W. Walbrick, H. Niesing, R. Schuurhuis

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引用次数: 10

摘要

在本文中，我们描述了用于减少半导体晶圆厂光刻区的周期时间的新方法。新的分析类型已经被使用，例如用于集群系统的EPT、有效利用率和集群正常运行时间

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Litho area cycle time reduction in an advanced 300mm semiconductor manufacturing line

In this paper, we describe new methodologies used to decrease the cycle time in a semiconductor fab's litho area. New types of analysis have been used, such as EPT for cluster systems, effective utilization, and cluster uptime

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来源期刊

The 17th Annual SEMI/IEEE ASMC 2006 Conference

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0.00%

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