Qiang Li, W. Xia, Yanxiong Zhang, X. Jing, Zishu He
{"title":"TDOA时延估计的硬件设计","authors":"Qiang Li, W. Xia, Yanxiong Zhang, X. Jing, Zishu He","doi":"10.1109/ICSPCC.2013.6664135","DOIUrl":null,"url":null,"abstract":"As Time difference of arrival (TDOA) needs high precision data for time delay estimation, a hardware system which can sample high precision data is presented in this paper. FPGA and DSP are taken as the general architecture in the hardware design. The precision of the system is improved by using GPS to synchronize time. The structure of the hardware system and the realization of data collection design flow are introduced. Finally, an estimation of time delay result by the cross correlation method will be given. Experiment results show the hardware design is effective and feasibility.","PeriodicalId":124509,"journal":{"name":"2013 IEEE International Conference on Signal Processing, Communication and Computing (ICSPCC 2013)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A hardware design for time delay estimation of TDOA\",\"authors\":\"Qiang Li, W. Xia, Yanxiong Zhang, X. Jing, Zishu He\",\"doi\":\"10.1109/ICSPCC.2013.6664135\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As Time difference of arrival (TDOA) needs high precision data for time delay estimation, a hardware system which can sample high precision data is presented in this paper. FPGA and DSP are taken as the general architecture in the hardware design. The precision of the system is improved by using GPS to synchronize time. The structure of the hardware system and the realization of data collection design flow are introduced. Finally, an estimation of time delay result by the cross correlation method will be given. Experiment results show the hardware design is effective and feasibility.\",\"PeriodicalId\":124509,\"journal\":{\"name\":\"2013 IEEE International Conference on Signal Processing, Communication and Computing (ICSPCC 2013)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-11-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Conference on Signal Processing, Communication and Computing (ICSPCC 2013)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSPCC.2013.6664135\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Conference on Signal Processing, Communication and Computing (ICSPCC 2013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSPCC.2013.6664135","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A hardware design for time delay estimation of TDOA
As Time difference of arrival (TDOA) needs high precision data for time delay estimation, a hardware system which can sample high precision data is presented in this paper. FPGA and DSP are taken as the general architecture in the hardware design. The precision of the system is improved by using GPS to synchronize time. The structure of the hardware system and the realization of data collection design flow are introduced. Finally, an estimation of time delay result by the cross correlation method will be given. Experiment results show the hardware design is effective and feasibility.