Ramping New IC Products in the Deep Submicron Age

It is well known that the majority of the potential profits are early in a products life. This is especially true in product segments such as system on a chip, graphics accelerators, microprocessors, and memory. The spoils in these segments go the company who gets its product to market first. At the same time, the investments required to produce the next generation products is going up at an accelerated pace. As a result, companies are sharing the investment by working with more third party suppliers. Today, a chip will be designed with 3rd party EDA tools and using commercial IP. It is often manufactured in commercial foundries, and tested and assembled a separate company. When the product is not meeting yield and performance, how are the issues resolved? Eventually, these yield issues are resolved, but often not before the profitable part of the product's life-style is complete. In this presentation we describe new methodologies, tools and services, which can help, turn designs into products. We will summarize the key technical issues, which make performance and yield targets difficult to meet given the product's life-style constraints and demonstrate how these new methodologies can greatly change the production ramp. Examples of these methods applied to advanced products such as microprocessors, embedded DRAM, and system on a chip, and DRAM will be provided.