60 GHz射频前端65纳米CMOS器件建模

2009 NORCHIP Pub Date : 2009-11-01 DOI:10.1109/NORCHP.2009.5397803

S. Tao, S. Rodriguez, A. Rusu, M. Ismail

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引用次数: 3

摘要

针对60ghz前端集成电路，提出了一种基于电磁仿真的有源和无源器件建模方案。利用现有的晶体管紧凑模型作为核心，开发了一个电磁模型，以解释由于布线堆叠而产生的寄生元件。基于电磁仿真s参数数据，推导了螺旋电感的集总模型。该模型与工艺和布局相关，并通过60 GHz射频前端低噪声放大器的设计验证了该模型的正确性。

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Device modelling for 60 GHz radio front-ends in 65 nm CMOS

This paper presents an electromagnetic simulation-based modelling solution for active and passive devices which targets 60 GHz front-end integrated circuits. An EM model, using existing transistor compact models as core, is developed to account for the parasitic elements due to wiring stacks. A spiral inductor lumped model, based on EM simulation S-parameter data is also derived. The models are process and layout dependent, which have been verified by the design of a low noise amplifier in a 60 GHz radio front-end.

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来源期刊

2009 NORCHIP

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