{"title":"无线发射机调制噪声内置测试仪","authors":"O. Eliezer, O. Friedman, R. Staszewski","doi":"10.1109/DCAS.2006.321033","DOIUrl":null,"url":null,"abstract":"A fully digital implementation for an RF built-in self-test (RF BIST), incorporated within a digital RF processor (DRPtrade)-based system-on-chip (SoC), is presented. The proposed mechanism serves as an on-chip built-in modulation-noise estimation-module (BIMNEM) for the testing of the 2.4 GHz local oscillator of a Bluetooth transceiver offered by Texas Instruments. This SoC, realized in a standard 130 nm digital CMOS process, is being tested in mass production using a digital very-low-cost-tester (VLCT) that leverages on the internal test capabilities of the SoC, thereby minimizing test costs. Experimental results are shown and the extension of this approach for implementation in the later generations of DRP based SoCs is briefly discussed","PeriodicalId":244429,"journal":{"name":"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A Built-in Tester for Modulation Noise in a Wireless Transmitter\",\"authors\":\"O. Eliezer, O. Friedman, R. Staszewski\",\"doi\":\"10.1109/DCAS.2006.321033\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fully digital implementation for an RF built-in self-test (RF BIST), incorporated within a digital RF processor (DRPtrade)-based system-on-chip (SoC), is presented. The proposed mechanism serves as an on-chip built-in modulation-noise estimation-module (BIMNEM) for the testing of the 2.4 GHz local oscillator of a Bluetooth transceiver offered by Texas Instruments. This SoC, realized in a standard 130 nm digital CMOS process, is being tested in mass production using a digital very-low-cost-tester (VLCT) that leverages on the internal test capabilities of the SoC, thereby minimizing test costs. Experimental results are shown and the extension of this approach for implementation in the later generations of DRP based SoCs is briefly discussed\",\"PeriodicalId\":244429,\"journal\":{\"name\":\"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCAS.2006.321033\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCAS.2006.321033","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Built-in Tester for Modulation Noise in a Wireless Transmitter
A fully digital implementation for an RF built-in self-test (RF BIST), incorporated within a digital RF processor (DRPtrade)-based system-on-chip (SoC), is presented. The proposed mechanism serves as an on-chip built-in modulation-noise estimation-module (BIMNEM) for the testing of the 2.4 GHz local oscillator of a Bluetooth transceiver offered by Texas Instruments. This SoC, realized in a standard 130 nm digital CMOS process, is being tested in mass production using a digital very-low-cost-tester (VLCT) that leverages on the internal test capabilities of the SoC, thereby minimizing test costs. Experimental results are shown and the extension of this approach for implementation in the later generations of DRP based SoCs is briefly discussed