HiPCrypto:高性能VLSI加密芯片

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) Pub Date : 1998-09-13 DOI:10.1109/ASIC.1998.722785

S. Salomão, V. Alves, E. Filho

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引用次数: 23

摘要

数据安全是当今计算机网络中的一个重要问题。本文介绍了实现IDEA加密算法的HiPCrypto芯片。HiPCrypto面向要求高吞吐量的计算机网络应用。它的架构利用了IDEA算法中可用的空间和时间并行性。当在53mhz时钟下工作时，HiPCrypto可以以高达3.4 Gbps的数据速率加密/解密。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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HiPCrypto: a high-performance VLSI cryptographic chip

Data security is an important issue in today's computer networks. This paper presents the HiPCrypto chip, which implements the IDEA cryptographic algorithm. HiPCrypto is oriented towards computer network applications demanding high throughput. Its architecture exploits both the spatial and the temporal parallelism available in the IDEA algorithm. When operating at a 53 MHz clock, HiPCrypto can encrypt/decrypt at data rates up to 3.4 Gbps.

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Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

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