{"title":"CdTe太阳能电池的器件建模、优化与分析","authors":"S. Pandey, Krishna Kumar","doi":"10.1109/UPCON.2016.7894668","DOIUrl":null,"url":null,"abstract":"The performance of the CdTe based solar cell is investigated using solar cell capacitance simulator (SCAPS) software. We have studied the influence of carrier density, thickness of the CdTe absorber layer, working temperature, CdZnS buffer layer thickness and its carrier density on the cell performance. The optimum thickness of absorber layer is found to be 2.0 µm with 0.02 µm buffer layer and 0.02 µm TCO layer. Various factors affecting the solar cell's performance has been rigorously investigated; more specifically physical parameters of buffer and absorber layer. By optimizing the device parameters we have achieved conversion efficiency of 15.46% with open circuit voltage (Voc) = 1.0984 V, short circuit current density (Jsc) = 16.2023 mA/cm2 and fill factor (FF) = 86.89.","PeriodicalId":151809,"journal":{"name":"2016 IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics Engineering (UPCON)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Device modeling, optimization and analysis of CdTe solar cell\",\"authors\":\"S. Pandey, Krishna Kumar\",\"doi\":\"10.1109/UPCON.2016.7894668\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The performance of the CdTe based solar cell is investigated using solar cell capacitance simulator (SCAPS) software. We have studied the influence of carrier density, thickness of the CdTe absorber layer, working temperature, CdZnS buffer layer thickness and its carrier density on the cell performance. The optimum thickness of absorber layer is found to be 2.0 µm with 0.02 µm buffer layer and 0.02 µm TCO layer. Various factors affecting the solar cell's performance has been rigorously investigated; more specifically physical parameters of buffer and absorber layer. By optimizing the device parameters we have achieved conversion efficiency of 15.46% with open circuit voltage (Voc) = 1.0984 V, short circuit current density (Jsc) = 16.2023 mA/cm2 and fill factor (FF) = 86.89.\",\"PeriodicalId\":151809,\"journal\":{\"name\":\"2016 IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics Engineering (UPCON)\",\"volume\":\"75 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics Engineering (UPCON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/UPCON.2016.7894668\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics Engineering (UPCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/UPCON.2016.7894668","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Device modeling, optimization and analysis of CdTe solar cell
The performance of the CdTe based solar cell is investigated using solar cell capacitance simulator (SCAPS) software. We have studied the influence of carrier density, thickness of the CdTe absorber layer, working temperature, CdZnS buffer layer thickness and its carrier density on the cell performance. The optimum thickness of absorber layer is found to be 2.0 µm with 0.02 µm buffer layer and 0.02 µm TCO layer. Various factors affecting the solar cell's performance has been rigorously investigated; more specifically physical parameters of buffer and absorber layer. By optimizing the device parameters we have achieved conversion efficiency of 15.46% with open circuit voltage (Voc) = 1.0984 V, short circuit current density (Jsc) = 16.2023 mA/cm2 and fill factor (FF) = 86.89.