CMOS静态存储器的总剂量辐射硬化及测试问题

Records of the 1993 IEEE International Workshop on Memory Testing Pub Date : 1993-08-09 DOI:10.1109/MT.1993.263140

R. Hensley, A. Srivastava

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摘要

辐射硬化电路应根据硬度进行加工和设计。结果表明，MOSIS两微米CMOS技术具有辐射硬化特性，使其特别适用于添加电路以补偿零输入噪声裕度的辐射引起的退化的设计方法。解释了补偿电路的非理想特性，并探讨了该电路在静态RAM单元中的应用

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Total dose radiation hardening and testing issues of CMOS static memories

A radiation hardened circuit should be both processed and designed for hardness. It is demonstrated that the MOSIS two micron CMOS technology exhibits radiation hardened properties, making it particularly suitable for a design methodology in which circuitry is added to compensate for the radiation induced degradation of the zero input noise margin. The non-ideal behavior of the compensation circuitry is explained and application of the circuitry in a static RAM cell is explored.<>

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Records of the 1993 IEEE International Workshop on Memory Testing

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