{"title":"单片p沟道JFET四极运算放大器","authors":"W. Davis, R. Vyne","doi":"10.1109/ISSCC.1984.1156588","DOIUrl":null,"url":null,"abstract":"A 10MHz amplifier with a 45V/μs slew rate, and 1.8μs settling time to 1/2LSB of 12b (10V step), will be covered. An NPN output stage and compensated Miller amplifier provides 500pF drive, 55° phase and 5dB gain margins over (+14/-14.7) V output swing.","PeriodicalId":260117,"journal":{"name":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A monolithic P-channel JFET QUAD operational amplifier\",\"authors\":\"W. Davis, R. Vyne\",\"doi\":\"10.1109/ISSCC.1984.1156588\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 10MHz amplifier with a 45V/μs slew rate, and 1.8μs settling time to 1/2LSB of 12b (10V step), will be covered. An NPN output stage and compensated Miller amplifier provides 500pF drive, 55° phase and 5dB gain margins over (+14/-14.7) V output swing.\",\"PeriodicalId\":260117,\"journal\":{\"name\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1984.1156588\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1984.1156588","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A monolithic P-channel JFET QUAD operational amplifier
A 10MHz amplifier with a 45V/μs slew rate, and 1.8μs settling time to 1/2LSB of 12b (10V step), will be covered. An NPN output stage and compensated Miller amplifier provides 500pF drive, 55° phase and 5dB gain margins over (+14/-14.7) V output swing.