The Gate Length Dependence of Single Event Upset in 14Nm Bulk and SOI Finfetc Sram Cells

In this paper, the impact of gate length on Single Event Upset (SEU) characteristics of 14 nm bulk and SOI FinFET 6T SRAM is investigated and compared by mixed-mode 3D TCAD simulation. Simulation results show that for both bulk and SOI FinFET SRAM cells, the threshold linear energy transfer (LETth) decreases with decreasing the gate length. The LETth of SOI FinFET SRAM is larger but decreases more rapidly compared with bulk FinFET SRAM. Besides, the critical charges (Qe-«) and collected charges (Qeen) are analyzed to explain the gate length dependence of LETth in FinFET SRAM cells. The results imply that as the gate length shrinks, the SEU susceptibility of bulk and SOI FinFET SRAM becomes more severe, especially for SOI FinFET SRAM.