跟踪驱动逻辑合成-应用于功率最小化

L. Carloni, P. McGeer, A. Saldanha, A. Sangiovanni-Vincentelli
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引用次数: 0

摘要

提出了一种跟踪驱动的逻辑综合与优化方法。给定数字电路C的逻辑描述和输入向量T的预期轨迹,推导出在T应用下优化成本函数的C的实现。这种方法在捕获和利用特定于应用程序设计的输入信号之间存在的相关性方面是有效的。这个想法是新颖的,因为它在逻辑层面上提出了综合和优化,其目标是优化所选成本度量的平均情况,而不是最坏情况。本文重点研究了多电平网络中轨迹驱动优化算法的发展,以使开关功率最小。在一组基准fsm上获得的平均净功耗降低(内部加上I/O功耗)为14%,而内部功耗平均降低为25%。我们还证明了I/O转换活动提供了可以通过组合逻辑合成实现的功耗降低的上限。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Trace driven logic synthesis-application to power minimization
A trace driven methodology for logic synthesis and optimization is proposed. Given a logic description of a digital circuit C and an expected trace of input vectors T, an implementation of C that optimizes a cost function under application of T is derived. This approach is effective in capturing and utilizing the correlations that exist between input signals on an application specific design. The idea is novel since it proposes synthesis and optimization at the logic level where the goal is to optimize the average case rather than the worst case for a chosen cost metric. The paper focuses on the development of algorithms for trace driven optimization to minimize the switching power in multi level networks. The average net power reduction (internal plus I/O power) obtained on a set of benchmark FSMs is 14%, while the average reduction in internal power is 25%. We also demonstrate that the I/O transition activity provides an upper bound on the power reduction that can be achieved by combinational logic synthesis.
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