基于嵌入式RISC内核的MPEG-2音频解码器的系统级集成方法

1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453) Pub Date : 1999-06-08 DOI:10.1109/VTSA.1999.785996

T. Tsai, Liang-Gee Chen, R. Wu

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引用次数: 0

摘要

MPEG2音频解码算法涉及多种复杂的编码技术，难以进行高效的专用架构设计。本文提出了一种有效的MPEG2音频解码器结构。MPEG2音频算法大致可以分为两类操作。基于标准单元设计技术，芯片尺寸为6.4/spl倍/6.4 mm/sup 2/，测试芯片可在最高43.5 MHz时钟频率下运行。

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A system level integration methodology for MPEG-2 audio decoder with embedded RISC core

MPEG2 audio decoding algorithms are involved of several complex-coding techniques and therefore difficult to do efficient dedicated architecture design. In this paper, we present an effective architecture for the MPEG2 audio decoder. The MPEG2 audio algorithms can be roughly divided into two types of operations. Based on standard cell design technique, the chip size is 6.4/spl times/6.4 mm/sup 2/, and the tested chip can run at maximum 43.5 MHz clock rate.

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1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)

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