J. Pekarik, V. Jain, C. Kenney, J. Holt, S. Khokale, S. Saroop, Jeffrey B. Johnson, K. Stein, V. Ontalus, Christopher Durcan, Mona Nafari, T. Nesheiwat, S. Saudari, Elahe Yarmoghaddam, Saloni Chaurasia, A. Joseph
{"title":"SiGe HBTs与${f_{T}/f_{\\max}\\,\\sim\\,375/510GHz}$集成在45nm PDSOI CMOS","authors":"J. Pekarik, V. Jain, C. Kenney, J. Holt, S. Khokale, S. Saroop, Jeffrey B. Johnson, K. Stein, V. Ontalus, Christopher Durcan, Mona Nafari, T. Nesheiwat, S. Saudari, Elahe Yarmoghaddam, Saloni Chaurasia, A. Joseph","doi":"10.1109/BCICTS50416.2021.9682454","DOIUrl":null,"url":null,"abstract":"A 45nm BiCMOS process, based on PDSOI CMOS, with SiGe HBT NPNs having ${f_{T}f_{\\max}\\,=\\,375/510GHz}$ is presented. The bipolars are integrated on a PDSOI wafer in an epitaxial region above the handle wafer to avoid self-heating concerns. To our knowledge, this is the first time a high performance SiGe BiCMOS process has been demonstrated on a PDSOI wafer. In addition to the HBTs, the technology features high performance NFETs with ${f_{T}f_{MAX}\\,=\\,265/330GHz}$ and PFETs with ${f_{T}f_{MAX}\\,=\\,250/340GHz}$ enabling flexibility in circuit design. A full-flow demonstration PDK, digital standard cell and IO cell libraries have been released for experimental circuit design work. This work, funded under the DARPA T-MUSIC program, will address future extensions to higher HBT performance and more-advanced CMOS nodes.","PeriodicalId":284660,"journal":{"name":"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"170 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"SiGe HBTs with ${f_{T}/f_{\\\\max}\\\\,\\\\sim\\\\,375/510GHz}$ Integrated in 45nm PDSOI CMOS\",\"authors\":\"J. Pekarik, V. Jain, C. Kenney, J. Holt, S. Khokale, S. Saroop, Jeffrey B. Johnson, K. Stein, V. Ontalus, Christopher Durcan, Mona Nafari, T. Nesheiwat, S. Saudari, Elahe Yarmoghaddam, Saloni Chaurasia, A. Joseph\",\"doi\":\"10.1109/BCICTS50416.2021.9682454\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 45nm BiCMOS process, based on PDSOI CMOS, with SiGe HBT NPNs having ${f_{T}f_{\\\\max}\\\\,=\\\\,375/510GHz}$ is presented. The bipolars are integrated on a PDSOI wafer in an epitaxial region above the handle wafer to avoid self-heating concerns. To our knowledge, this is the first time a high performance SiGe BiCMOS process has been demonstrated on a PDSOI wafer. In addition to the HBTs, the technology features high performance NFETs with ${f_{T}f_{MAX}\\\\,=\\\\,265/330GHz}$ and PFETs with ${f_{T}f_{MAX}\\\\,=\\\\,250/340GHz}$ enabling flexibility in circuit design. A full-flow demonstration PDK, digital standard cell and IO cell libraries have been released for experimental circuit design work. This work, funded under the DARPA T-MUSIC program, will address future extensions to higher HBT performance and more-advanced CMOS nodes.\",\"PeriodicalId\":284660,\"journal\":{\"name\":\"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"volume\":\"170 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-12-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BCICTS50416.2021.9682454\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS50416.2021.9682454","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SiGe HBTs with ${f_{T}/f_{\max}\,\sim\,375/510GHz}$ Integrated in 45nm PDSOI CMOS
A 45nm BiCMOS process, based on PDSOI CMOS, with SiGe HBT NPNs having ${f_{T}f_{\max}\,=\,375/510GHz}$ is presented. The bipolars are integrated on a PDSOI wafer in an epitaxial region above the handle wafer to avoid self-heating concerns. To our knowledge, this is the first time a high performance SiGe BiCMOS process has been demonstrated on a PDSOI wafer. In addition to the HBTs, the technology features high performance NFETs with ${f_{T}f_{MAX}\,=\,265/330GHz}$ and PFETs with ${f_{T}f_{MAX}\,=\,250/340GHz}$ enabling flexibility in circuit design. A full-flow demonstration PDK, digital standard cell and IO cell libraries have been released for experimental circuit design work. This work, funded under the DARPA T-MUSIC program, will address future extensions to higher HBT performance and more-advanced CMOS nodes.