R. van Schaijk, M. van Duuren, P. Goarin, W. Y. Mei, K. van der Jeugd
{"title":"嵌入式SONOS存储器的可靠性","authors":"R. van Schaijk, M. van Duuren, P. Goarin, W. Y. Mei, K. van der Jeugd","doi":"10.1109/ESSDER.2004.1356543","DOIUrl":null,"url":null,"abstract":"In this work, arrays of two transistor (2T) and compact SONOS memory cells are presented together with an extensive reliability investigation. SONOS, which stands for semiconductor-oxide-nitride-oxide-semiconductor, is a non-volatile memory concept, which has recently regained strong attention because floating gate flash has reached its scaling limits. The better scaling perspective, together with the ease of integration in a base line CMOS process, makes SONOS an excellent candidate for embedded flash in future CMOS generations. This is especially true for the compact cell variant, which consists of a merged access gate (AG) and control gate (CG), giving extra advantages like smaller cell size and the reduction of short channel effects compared with the discrete two transistor variant.","PeriodicalId":287103,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Reliability of embedded SONOS memories\",\"authors\":\"R. van Schaijk, M. van Duuren, P. Goarin, W. Y. Mei, K. van der Jeugd\",\"doi\":\"10.1109/ESSDER.2004.1356543\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, arrays of two transistor (2T) and compact SONOS memory cells are presented together with an extensive reliability investigation. SONOS, which stands for semiconductor-oxide-nitride-oxide-semiconductor, is a non-volatile memory concept, which has recently regained strong attention because floating gate flash has reached its scaling limits. The better scaling perspective, together with the ease of integration in a base line CMOS process, makes SONOS an excellent candidate for embedded flash in future CMOS generations. This is especially true for the compact cell variant, which consists of a merged access gate (AG) and control gate (CG), giving extra advantages like smaller cell size and the reduction of short channel effects compared with the discrete two transistor variant.\",\"PeriodicalId\":287103,\"journal\":{\"name\":\"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDER.2004.1356543\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDER.2004.1356543","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this work, arrays of two transistor (2T) and compact SONOS memory cells are presented together with an extensive reliability investigation. SONOS, which stands for semiconductor-oxide-nitride-oxide-semiconductor, is a non-volatile memory concept, which has recently regained strong attention because floating gate flash has reached its scaling limits. The better scaling perspective, together with the ease of integration in a base line CMOS process, makes SONOS an excellent candidate for embedded flash in future CMOS generations. This is especially true for the compact cell variant, which consists of a merged access gate (AG) and control gate (CG), giving extra advantages like smaller cell size and the reduction of short channel effects compared with the discrete two transistor variant.