残数双lsb编码的模2n+1乘法器

G. Jaberipur, H. Alavi
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引用次数: 4

摘要

模2n+1加法器和/或乘法器用于数字滤波器、密码系统和基于剩余数系统(RNS)的数字信号处理器。模集{2n−1,2n, 2n+1}在RNS应用中很流行,其中模2n+1乘法器的设计比其他两个模的情况更具挑战性。一个原因是残数在[0,2n]范围内的自然表示需要n+1位。然而,许多模2n+1的加法或乘法方案使用n位减1表示残数,其中零操作数应该单独处理。另一方面,模2n+1残数的双lsb编码(即具有第二个最低有效位的n位码字)已被用于设计高效的模2n+1加法器。因此,我们有动机研究残基的双lsb编码对模2n+1乘法器设计的影响。我们用点表示法描述了这些乘法器的操作,并表明相应的电路只使用标准的现成算术单元,如全加法器、半加法器和进位预读逻辑。与先前报道的乘法器的综合比较显示了所提出设计的优点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A modulo 2n+1 multiplier with double-LSB encoding of residues
Modulo 2n+1 adders and/or multipliers are used in digital filters, cryptographic systems, and digital signal processors based on residue number systems (RNS). The moduli set {2n−1, 2n, 2n+1} is popular in RNS applications, where the design of modulo 2n+1 multipliers is more challenging than the case of other two moduli. One reason is that the natural representation of residues in the range [0, 2n] requires n+1 bits. However, a number of modulo 2n+1 addition or multiplication schemes have used n-bit diminished-1 representation of residues, where zero operands are supposed to be treated separately. On the other hand, double-LSB encoding of modulo 2n+1 residues (i.e., an n-bit code word with a second least significant bit) has been used in the design of an efficient modulo 2n+1 adder. We are therefore motivated to study the impact of the double-lsb encoding of residues on the design of modulo 2n+1 multipliers. We describe the operation of such multipliers in dot-notation representation and show that the corresponding circuitry uses only standard off the shelf arithmetic cells such as full adders, half adders and carry look-ahead logic. Synthesis based comparison with previously reported multipliers shows the advantages of the proposed design.
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