A single-chip CMOS CCD camera interface circuit with digitally controlled AGC

This paper describes a single-chip solution for CMOS CCD camera interface systems. The required AGC gain in the proposed circuit is controlled directly by digital bits without conventional extra DAC's. Nonlinear errors such as offsets in signal paths are automatically removed during black-level correction. The AGC outputs are transferred to a 10 b on-chip ADC. The prototype implemented in a 0.5 /spl mu/m n-well CMOS process shows the 32-dB AGC dynamic range CMOS process shows the 32-dB AGC dynamic range in 1/8-dB step with 173 mW at 3 V and 25 MHz.