基于新型比较器的GaAs多位δ - σ A/D转换器设计

R. Hickling, M. Yagi, H. H. Salman
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引用次数: 0

摘要

本文描述了基于一种新型比较器组结构的多位δ - σ转换器的设计。比较器组方法消除了比较器阈值终端的需要,允许每个单独的锁存比较器在相同的差分输入信号上操作。这种新的比较器设计被整合到一个完整的4位δ - σ调制器中,该调制器采用0.6 /spl mu/m GaAs MESFET工艺制造。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
GaAs multibit delta-sigma A/D converters based upon a new comparator design
In this paper, the design of multibit delta-sigma converters based upon a new comparator bank structure is described. The comparator bank approach eliminates the need for comparator threshold terminals, allowing each of the individual latched comparators to operate upon the same differential input signal. This new comparator design was incorporated into a complete four-bit delta-sigma modulator which was fabricated on a 0.6 /spl mu/m GaAs MESFET process.
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