在部分可重构硬件上调度可分负载

2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Pub Date : 2006-04-24 DOI:10.1109/FCCM.2006.63

K. Vikram, V. Vasudevan

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引用次数: 1

摘要

对于映射到部分可重构混合处理器架构的可重构结构(reconfigurable fabric, RF)上的任务，如果使用多个处理单元(processing unit, pu)对任务进行加速，可以获得显著的加速效果。本文给出了基于总线的混合处理器体系结构中单个数据并行任务映射到射频的定量分析结果。这种情况下的体系结构约束包括运行时重新配置延迟和到主存的共享数据总线

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Scheduling divisible loads on partially reconfigurable hardware

For a task mapped to the reconfigurable fabric (RF) of partially reconfigurable hybrid processor architecture, significant speedup can be obtained if multiple processing units (PUs) are used to accelerate the task. In this paper, the authors present the results obtained from a quantitative analysis for a single data-parallel task mapped to the RF of bus-based hybrid processor architecture. The architectural constraints in this case include run-time reconfiguration delay and a shared data bus to main memory

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2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines

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