用电容模式晶体管作为电容-晶体管逻辑元件的研究

2009 International Conference and Seminar on Micro/Nanotechnologies and Electron Devices Pub Date : 2009-07-01 DOI:10.1109/EDM.2009.5173953

A. V. Nikolaev

{"title":"用电容模式晶体管作为电容-晶体管逻辑元件的研究","authors":"A. V. Nikolaev","doi":"10.1109/EDM.2009.5173953","DOIUrl":null,"url":null,"abstract":"This paper consider possibility of building complex logic capacitor-transistor devices with using transistor in cap mode (with shorted source and drain) as cap element. Parameters deviations from theoretical values caused by real device influence are obtained with technology device modeling in ISE TCAD.","PeriodicalId":262499,"journal":{"name":"2009 International Conference and Seminar on Micro/Nanotechnologies and Electron Devices","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Researching of using transistor in cap mode as element of a capacitor-transistor logic\",\"authors\":\"A. V. Nikolaev\",\"doi\":\"10.1109/EDM.2009.5173953\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper consider possibility of building complex logic capacitor-transistor devices with using transistor in cap mode (with shorted source and drain) as cap element. Parameters deviations from theoretical values caused by real device influence are obtained with technology device modeling in ISE TCAD.\",\"PeriodicalId\":262499,\"journal\":{\"name\":\"2009 International Conference and Seminar on Micro/Nanotechnologies and Electron Devices\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Conference and Seminar on Micro/Nanotechnologies and Electron Devices\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDM.2009.5173953\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference and Seminar on Micro/Nanotechnologies and Electron Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDM.2009.5173953","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

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摘要

本文考虑了用电容电容模式晶体管(源极极短路)作为电容元件构建复杂逻辑电容-晶体管器件的可能性。利用ISE TCAD中的工艺器件建模，得到了实际器件影响下参数与理论值的偏差。

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Researching of using transistor in cap mode as element of a capacitor-transistor logic

This paper consider possibility of building complex logic capacitor-transistor devices with using transistor in cap mode (with shorted source and drain) as cap element. Parameters deviations from theoretical values caused by real device influence are obtained with technology device modeling in ISE TCAD.

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2009 International Conference and Seminar on Micro/Nanotechnologies and Electron Devices

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